.. _describe_platform: Describe a target platform ========================== Hardware platforms are described using XN. An XN file provides information to the XMOS compiler toolchain about the target hardware, including XMOS devices, ports, flash memories and oscillators. The XMOS tools use the XN data to generate a platform-specific header file ````, and to compile, boot and debug multi-node programs. .. _describe_platform_supported_network_topologies: Supported network topologies ---------------------------- To route messages across the xCONNECT Link network, the routing ID and routing table of each node on the network must configured. The tools use the information in the XN file to setup the routing for the network before running the application. If the routing configuration is explicitly specified in the XN file, the tools use this configuration. If the routing configuration is omitted from the XN file the tools choose a suitable set routing IDs and routing tables based on the network topology. The tools can automatically compute routing configurations for the the following network topologies. .. _platform_automatic_routing_topologies: .. table:: Topologies that can be automatically routed +-------------------------------+-------------------------------------------------+ | Network Topology | Supported Configurations | +===============================+=================================================+ | Line | Not supported on XS1-G devices | +-------------------------------+-------------------------------------------------+ +-------------------------------+-------------------------------------------------+ | Hypercube | Degree-2 (pair of nodes) | | +-------------------------------------------------+ | | Degree-3 (ring of 4 nodes) | | +-------------------------------------------------+ | | Degree-3 (cube of 8 nodes) | | +-------------------------------------------------+ | | Degree-4 (canonical cube of 16 nodes) | +-------------------------------+-------------------------------------------------+ +-------------------------------+-------------------------------------------------+ | Hypercube with trees attached | Not supported on XS1-G devices | +-------------------------------+-------------------------------------------------+ .. _describe_platform_describe_simple_hardware_platform: A board with two packages ------------------------- :ref:`describe_platform_describe_simple_hardware_platform_example` illustrates a board containing two XMOS L8-64 devices arranged in a line. A suitable XN description is described below. .. _describe_platform_describe_simple_hardware_platform_example: .. figure:: images/xn-board.* Example hardware platform An XN file starts with an XML declaration. :: The following code provides the start of the network. :: The following code declares two xCORE Tiles. The declaration "``tileref tile[2];``" is exported to the header file ````. :: tileref tile[2] The following code declares a package named ``P1``, which contains a single node named ``Master``. :: The node ``Master`` is a 400MHz XS1-L8A-64 device in a TQ128 package, clocked by a 20MHz oscillator. It is booted from an SPI device named "bootFlash" which has the class "SPIFlash". The declaration of tile "0" is associated with ``tile[0]`` and the ports 1A, 1B, 1C, 1D and 4A are given symbolic names. These declarations are exported to the header file ````. The following code declares a package named ``P2``, which contains a single node named ``Slave``. :: The node ``Slave`` is a 400MHz XS1-L8A-64 device in a TQ128 package, clocked by a 20MHz oscillator. It is booted from node ``Master`` over an xCONNECT Link. The following code defines a 2-wire xCONNECT Link with, which connects the node ``Master`` on link X0LD to the node ``Slave`` on link ``X0LB``. :: The links have intra-symbol and inter-symbol delays of 4 clock periods. The following code specifies a list of components on the board that are connected to XMOS devices. :: A device named ``bootFlash`` is connected to xCORE Tile 0 on Node ``Master``, and is given attributes that associate the four SPI pins on the device with ports. (The class ``SPIFlash`` is recognized by XFLASH.) The following code describes the JTAG scan chain. ::